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AMD and Intel will work together to create a single PyTorch code path for AI inference on CPUs

Intel and AMD are integrating their CPU optimizations for PyTorch into a unified library, offering tuning for both AMD and Intel chips through the oneDNN library. AMD has maintained a downstream version of oneDNN called ZenDNN, which is now moving into the open-source oneDNN, published by the UXL Foundation and driven by Intel. AMD also announced it's joining the UXL Foundation as a "steering member," which "influences the future of the UXL Foundation" in exchange for a contribution of $20,000 per year.

AMD says the move to unify these efforts under oneDNN was recommended by the x86 Ecosystem Advisory Group (EAG), which is a joint initiative that primarily exists between Intel and AMD and was established in 2024. The two companies have collaborated through the EAG previously, such as with the ACE extensions for x86 that we learned about earlier this year.

The oneDNN backend is used for CPU inference, and it's built to accelerate that workload for the latest Intel (and now AMD) chips in frameworks like PyTorch. When oneDNN was added to PyTorch as a backend in late 2023, it showed a 1.24x improvement with the Float32 data type, and 2.21x for the BFloat16 data type.

From the oneDNN GitHub, the library "detects hardware features at runtime" to generate optimized kernels for the platform, as well as provides low-precision data types. It also features optimized instructions for common AI and machine learning operations, such as matrix multiplication and convolution.

For developers, the move simplifies working with PyTorch across different systems, ensuring a single backend provides the proper optimizations for whatever hardware you're running. Although the news here is focused on the x86 guard, oneDNN is a cross-platform library that works on Arm and RISC-V architectures as well.

Intel originally developed oneDNN, built on top of previously deep learning libraries, before it was folded into the UXL Foundation. Intel was among the founding members of the UXL Foundation, alongside Arm, Qualcomm, Google Cloud, and others.

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Mysterious AMD Zen 6 APU with 24GB of LPDDR5 memory appears in benchmarks

An AMD engineering sample has made an appearance in a listing on OpenBenchmarking. According to a report by TechPowerUp, the chip could potentially be a part of AMD’s upcoming Gainsborough family and a possible candidate for the next-generation Steam Deck handheld console. As per the OpenBenchmarking listing, the chip comes with a six-core, 12-thread processor paired with 24GB of high-speed LPDDR5 memory.

The engineering sample with part number 100-000001930-12_Y was tested on an AMD GBR-FF6-SKT validation board, with the CPU running at clock speeds of 2.4 GHz. The system also features four 6GB SK Hynix memory packages, resulting in 24GB of LPDDR5 memory running at 9,600 MT/s. That’s a big jump when compared to the current Steam Deck, which comes with 16GB of LPDDR5 memory running at 6,400 MT/s, alongside a four-core, eight-thread AMD Zen 2 processor.

A listing from OpenBenchmarking of an AMD engineering sample

(Image credit: OpenBenchmarking)

The benchmark listing also provides some clues about the processor’s underlying architecture. As per Notebookcheck, the sample’s CPU microcode revision corresponds to AMD’s Family 1Ah, model DCh. Linux kernel changes indicate that this model falls within the range reserved for newer Zen 6 processors, suggesting that Gainsborough could use AMD’s next-generation CPU architecture. However, there is no clarity or any confirmation whether it will use standard Zen 6 cores or the denser Zen 6C variant.

The integrated GPU is listed with a clock speed of 2,400 MHz, although its architecture and compute unit count remain unknown. The sample was tested using the GpuTest benchmark suite on Ubuntu 24.04 at 1024 x 768 resolution, resulting in scores of 3,871 in GiMark, 3,508 in FurMark, and 9,319 in TessMark. While the FurMark score is comparable to the original Stam Deck, we can’t really come to any conclusions at this point, as the tests were conducted on an engineering platform using development software rather than a finished handheld. For now, the results do not establish how the chip would perform in games, as power limits, cooling, driver maturity, and the final GPU configuration all contribute to the performance in a compact gaming device.

If these specifications carry over to a future Steam Deck, the additional CPU cores along with the larger and faster memory would provide a meaningful hardware upgrade. That being said, neither AMD nor Valve have confirmed a connection between the Gainsborough family and a future Steam Deck. Thus, it is best to take this with a grain of salt and wait until there is more concrete information in the future.

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Modal taps Nvidia Vera CPUs after firm's internal tests show 2x throughput over Intel and AMD chips

Nvidia has earned billions selling AI accelerators, but with the emergence of agentic AI, CPUs are going to play a considerably more significant role than before, which creates new opportunities for the company. Reuters reports that Nvidia has secured a major design win with its Vera CPUs with AI cloud provider Modal. According to Modal, preliminary evaluations showed that Vera could deliver twice the throughput of its existing AMD and Intel processors, although the company does not intend to cease using CPUs from its current suppliers.

Modal provides cloud infrastructure that enables AI developers to deploy AI agents that can perform complex operations autonomously over extended periods. Such workloads require substantial CPU resources for software execution, data processing, and other tasks that cannot be efficiently handled by GPUs. Modal currently relies exclusively on AMD and Intel processors for these operations, but its tests indicate that Nvidia's new Vera CPUs could significantly improve performance in its specific workloads. Of course, since Vera is based on an Arm instruction set architecture, Modal's decision to adopt Vera will require substantial modifications to its software. Nevertheless, Modal believes that the potential performance improvements justify the additional engineering effort.

The reported 2x throughput advantage is particularly interesting because agentic AI workloads can involve numerous independent tasks that compete for CPU cores, cache capacity, and memory bandwidth. However, Modal has not disclosed detailed benchmark configurations it used, specific AMD and Intel processor models, or performance-per-watt figures. Consequently, it remains unclear whether Vera's advantage is enabled by advantages of its Arm v9.2-based Olympus CPU cores that can decode and execute up to 10 instructions per cycle, its memory subsystem with 1.2 TB/s of bandwidth, or other architectural characteristics. Also note that tests compared Vera against currently available AMD and Intel processors rather than their upcoming generations that will compete against Vera in the coming years.

Since Modal cannot port all of its software to Arm ISA overnight, the company will continue using x86 CPUs from AMD and Intel, according to Modal chief executive Erik Bernhardsson. Rather than sticking to one ISA for everything, Modal intends to operate a heterogeneous server fleet and select the most suitable processors for each workload. Naturally, the company intends to evaluate upcoming AMD and Intel processors once they become available to make its choices in the future.

For Nvidia, the agreement represents a major step toward making Vera a standalone server processor that commands a major share of the server market. The company expects Vera sales to generate at least $20 billion during its current fiscal year and estimates the potential total available market for these CPUs is approximately $200 billion. The company is on track to sell at least four million Vera CPUs in fiscal 2026.

The announcement comes shortly after Modal secured $750 million in financing led by Accel, which valued the company at $15.75 billion. Modal expects its annual revenue to reach $1 billion within the next year. The company's service consumption has increased 3X in the last 12 months, while revenue has surged more than 15 times compared with the previous year, Reuters reports.

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Arm says its AGI CPU delivers nearly 2X the performance per rack of AMD EPYC 9755 in new agentic AI CPU tests

Arm announced last week that its AGI CPU, the company's data center CPU for agentic AI workloads, delivers twice the performance per rack as AMD EPYC 9755, calculated from chip performance and server-power assumptions measured across seven workloads. The claim stems from modeled rack results from tests aligned with Arm’s new CPU evaluation methodology, developed with support from Fujitsu, Meta, and OpenAI.

The results — verified in an Arm-commissioned independent analysis by Signal65 — do not establish the AGI CPU as the overall leader for agentic AI, as they apply to the selected processors, workloads, and configuration. They also use the specific Arm-developed evaluation methodology that Arm says should be the new standard for assessing performance. However, other chipmakers like AMD and Intel make performance claims based on different benchmarks. So, how is Agentic AI evolving CPU performance benchmarks, what does Arm propose to measure, and how do the different approaches compare?

Arm’s new CPU evaluation methodology

Agentic AI is changing the role of CPUs in modern AI data centers, requiring them to handle complex, multi-step workflows. Beyond inference, which the accelerator handles, AI agents execute tools, retrieve data, and maintain state within isolated environments, acting like virtual users. The CPU handles these critical surrounding workloads, from running those tools and serving database or API requests to preparing data and coordinating work for accelerators.

As these workloads scale rapidly with agentic capabilities, it becomes increasingly important to gauge CPU performance not just by how many agents can run concurrently, but also by how much useful work gets done. Arm argues that CPU performance is increasingly defined by how much useful work a system can sustain while staying responsive. Supporting more agents simultaneously offers limited benefit if their executions throttle or accelerators have to sit idle waiting for the CPU. Power, cooling, and physical space also limit how much hardware operators can deploy, extending the performance question to the rack.

Arm’s proposed methodology for evaluating CPU performance, developed with support from Fujitsu, Meta, and OpenAI, centers on representative agent workloads, repeatable CPU measurements, and validation against end-to-end task outcomes. In practical terms, the methodology identifies the tools and services an agent uses, measures their CPU performance under controlled conditions, and checks whether improvements help the agent complete its task. For example, a database test can establish how quickly a system handles transactions. An end-to-end evaluation would then examine whether faster database access actually improves the workflow that depends on it.

Executing the second aspect of the methodology, making these comparisons repeatable, presents another challenge, as an agent might choose different commands or take a different route through a task each time it runs. Model inference and remote services also introduce delays. Arm proposes replaying recorded agent actions to separate CPU performance from this variability, allowing different systems to execute a consistent sequence of work. Its whitepaper sets out a framework for selecting and interpreting these measurements, leaving the industry to develop an agreed benchmark suite and scoring approach.

To evaluate the CPU work described in its framework, Arm ran seven workloads — spanning tooling, agentic workflows, and reasoning/planning, plus Sandbench, which measures sandbox-creation overhead for agent execution — on its AGI CPU and AMD’s EPYC 9755. The tests combine established server applications with benchmarks focused on agent workflows.

Workloads and breakdowns

Workload

What it represents

Metric

MySQL

Transactional database behind agent tools

Transactions per second

NGINX

Web and API request handling

Requests per second

Milvus

Vector search for retrieval

Queries per second

Terminal-Bench 2

72 agent task types in sandboxed containers, 128 copies at once

Task completion time

SWE-bench replay

Software-engineering agent workflow, 259 tasks

Tasks per minute

fastText

CPU word-representation training

Words per second

vLLM CPU overhead

CPU serving overhead with model compute bypassed

Requests per second

The vLLM result measures the CPU work around model execution, not GPU inference throughput. Similarly, the report’s “reasoning/planning” category groups supporting CPU workloads and does not assess how intelligently a model reasons.

ARM AGI CPU vs AMD EPYC 9755

For the tests, Arm used two AGI CPU configurations because of hardware availability: a 128-core chip at 2.8 GHz with DDR5-7200 for Terminal-Bench 2 and SWE-bench replay, and a 136-core chip at 3.2 GHz with DDR5-8000 for the other five workloads. The AMD comparison used one socket of the 128-core EPYC 9755 with DDR5-6400. Both platforms ran the same benchmark scripts but used different software environments. Arm used custom Linux 7.1.3 builds, with Ubuntu 24.04 for most tests and Ubuntu 26.04 for SWE-bench, while AMD’s main recorded configuration used Ubuntu 24.04 and Linux 6.8, with settings varying by test.

At the chip level, Arm’s AGI CPU won the majority of comparisons when compared to its AMD counterpart in five of the seven tests. With the EPYC 9755 as the baseline, Arm led by 9% on Terminal-Bench, 13% on SWE-bench, and 97% on fastText, but lagged by 12% and 5% in MySQL and Milvus throughput, respectively. On average, the AGI CPU led by 20% (1.20x) per-chip advantage, calculated across the seven normalized performance ratios.

Results

Workload

Measured per-chip performance vs EPYC 9755

Modeled per-rack performance vs EPYC 9755

MySQL

0.88x

1.43x

NGINX

1.20x

1.95x

Terminal-Bench 2

1.09x

1.93x

SWE-bench replay

1.13x

2.00x

Milvus

0.95x

1.54x

vLLM CPU overhead

1.16x

1.88x

fastText

1.97x

3.19x

Arithmetic average

1.20x

1.99x

At the rack level, Arm’s modeled performance averages 1.99x AMD’s, with a lead in all seven workloads. The model uses rated server-power estimates of 950 W for the 128-core Arm configuration, 1,050 W for the 136-core version, and 1,700 W for AMD, including memory and other system components. After reserving about 8% of a 24 kW rack budget for networking and power distribution, this leaves room for 23 or 21 Arm servers versus 13 AMD servers.

For SWE-bench, the 2.00x per rack result was obtained by multiplying the roughly 1.13x chip result by 23/13. The larger gain comes from fitting more servers into the same power budget. Furthermore, these projections use modeled whole-server power, not throughput measurements from two fully populated racks.

Arm’s model also gives the AMD servers about twice as much RAM: roughly 2 TB against 1 TB for Arm. It allocates 4 GB per hardware thread, with each AMD core supporting two threads while each Arm core supports one. This puts the memory-power allowance at 336 W for AMD and 192 W for Arm. Signal65 also calculated what happens when memory is allocated per physical core. In this setup, AMD’s memory and power allowance falls, and Arm’s average modeled rack advantage drops from 1.99x to approximately 1.81x. The usefulness of the 2 TB AMD configuration depends on how much memory the workloads actually need, as SMT does not inherently require twice the memory.

To verify the findings, Signal65 remotely observed Arm’s test runs and examined the original logs, result files, scripts, and configuration records. A separate review team rebuilt the calculations with its own code and reproduced all seven results within 0.5%. However, Signal65 did not run a separate hardware rerun in its own lab. In addition, Signal65 could independently confirm BIOS and memory settings for only the EPYC 9965 system. These settings were unavailable for independent verification on the Arm and EPYC 9755 systems. Along with the software differences, these gaps slightly affect the certainty with which the results can be attributed to the processors themselves.

Arm’s approach vs AMD and Nvidia

While Arm believes its methodology should be the standard, it does not hold a monopoly on how the industry evaluates agentic CPU performance. For example, AMD promotes agents per watt, dollar, and rack. Footnotes on its EPYC 9006 page identify available CPU threads as a proxy for agent capacity, with actual throughput depending on the workload and system. Its separate workload analysis models a 100 kW rack and claims 2.37× performance for EPYC 9965 over Nvidia's Vera, using a geometric mean across six infrastructure workloads.

Nvidia, on the other hand, emphasizes Vera’s single-thread performance and memory bandwidth, and says a 256-CPU rack supports more than 22,500 concurrent CPU environments. These numbers describe different things and do not directly imply any specific advantage. Methodologies vary across manufacturers by workload, power assumptions, and aggregation methods, making direct CPU comparisons complex. The current comparison is against AMD's fifth-generation “Turin” processor with 128 cores. The company launched its latest sixth-generation EPYC 9006 “Venice” family this year, dedicated to agentic AI.

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IBM & Motorola 750 (PowerPC G3): Tech Specs

The G3 is a 32-Bit member of the PowerPC processor family, made by IBM and Motorola for Apple computers between 1997 – 2003. There are several different iterations of the G3 processor used in Apple computers such as the 740, 750, 750CX, 750CXe, and 750FX, though they belong in the same processor family.   The […]

The post IBM & Motorola 750 (PowerPC G3): Tech Specs appeared first on Low End Mac.

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